HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 972

• Manufacturer Part Number: HD6417750RF240DV
• Description: MPU 3V 16K I-TEMP,PB-FREE 208-QF
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF240DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 21 High-performance User Debug Interface (H-UDI)
21.2.4
The interrupt source register (SDINT) is a 16-bit register that can be read from and written to by
the CPU.
From the H-UDI pins, the INTREQ bit is set to 1 when a H-UDI interrupt command is set in the
SDIR register (Update-IR). While SDIR is holding a H-UDI interrupt command, the SDINT
register is connected between the TDI and TDO pins of the H-UDI, allowing it to be read as a 32-
bit register. In this case, the upper 16 bits will all be 0, and the lower 16 bits will represent SDINT.
From the CPU, only writing a 0 to the INTREQ bit is possible. While this bit holds a 1, the
interrupt requests continue to be issued, so this bit should always be cleared in the interrupt
handler.
This register is initialized in the Test-Logic-Reset state of TRST or TAP.
Bits 15 to 1—Reserved: These bits are always read as 0. When writing, only 0s should be written
here.
Bit 0⎯Interrupt Request (INTREQ): Indicates whether or not an interrupt request has been
issued by an H-UDI interrupt command. From the CPU, the interrupt request can be cleared by
writing a 0 to this bit. If a 1 is written to this bit, it retains the value it had before the write
operation.
Rev.7.00 Oct. 10, 2008 Page 886 of 1074
REJ09B0366-0700
Initial value:
Initial value:
Interrupt Source Register (SDINT) (SH7750R Only)
R/W:
R/W:
Bit:
Bit:
15
—
—
R
R
0
7
0
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
10
—
—
R
R
0
2
0
—
—
R
R
9
0
1
0
INTREQ
R/W
—
R
8
0
0
0