HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 51

• Manufacturer Part Number: HD6417750RF240DV
• Description: MPU 3V 16K I-TEMP,PB-FREE 208-QF
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF240DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

4.4
4.5
4.6
4.7
Section 5 Exceptions
5.1
5.2
5.3
5.4
5.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10 Notes on Using Cache Enhanced Mode (SH7750R Only)................................... 125
Instruction Cache (IC)....................................................................................................... 128
4.4.1
4.4.2
4.4.3
Memory-Mapped Cache Configuration (SH7750, SH7750S) .......................................... 131
4.5.1
4.5.2
4.5.3
4.5.4
Memory-Mapped Cache Configuration (SH7750R) ......................................................... 136
4.6.1
4.6.2
4.6.3
4.6.4
4.6.5
Store Queues ..................................................................................................................... 142
4.7.1
4.7.2
4.7.3
4.7.4
4.7.5
4.7.6
Overview........................................................................................................................... 149
5.1.1
5.1.2
Register Descriptions ........................................................................................................ 150
Exception Handling Functions .......................................................................................... 151
5.3.1
5.3.2
Exception Types and Priorities ......................................................................................... 152
Exception Flow ................................................................................................................. 155
5.5.1
5.5.2
RAM Mode .......................................................................................................... 123
OC Index Mode.................................................................................................... 124
Coherency between Cache and External Memory ............................................... 125
Prefetch Operation ............................................................................................... 125
Configuration ....................................................................................................... 128
Read Operation .................................................................................................... 130
IC Index Mode ..................................................................................................... 131
IC Address Array ................................................................................................. 131
IC Data Array....................................................................................................... 132
OC Address Array................................................................................................ 133
OC Data Array ..................................................................................................... 135
IC Address Array ................................................................................................. 137
IC Data Array....................................................................................................... 138
OC Address Array................................................................................................ 139
OC Data Array ..................................................................................................... 141
Summary of the Memory-Mapping of the OC..................................................... 142
SQ Configuration ................................................................................................. 142
SQ Writes............................................................................................................. 143
Transfer to External Memory............................................................................... 143
SQ Protection ....................................................................................................... 145
Reading the SQs (SH7750R Only) ...................................................................... 145
SQ Usage Notes ................................................................................................... 146
Features................................................................................................................ 149
Register Configuration......................................................................................... 149
Exception Handling Flow .................................................................................... 151
Exception Handling Vector Addresses ................................................................ 151
Exception Flow .................................................................................................... 155
Exception Source Acceptance.............................................................................. 156
........................................................................................................... 149
Rev.7.00 Oct. 10, 2008 Page xlix of lxxxiv
REJ09B0366-0700