HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 669

• Manufacturer Part Number: HD6417750RF240DV
• Description: MPU 3V 16K I-TEMP,PB-FREE 208-QF
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF240DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

(a) Normal DMA Mode
Table 14.8 shows the memory interfaces that can be specified for the transfer source and transfer
destination in DMA transfer initiated by an external request supported by this LSI in normal DMA
mode.
Table 14.8 External Request Transfer Sources and Destinations in Normal DMA Mode
1
2
3
4
5
6
7
8
"SRAM-type" in the table indicates an SRAM, byte control SRAM, or burst ROM setting.
Notes: Memory interfaces on which transfer is possible in single address mode are SRAM, byte
(b) DDT Mode
Table 14.9 shows the memory interfaces that can be specified for the transfer source and transfer
destination in DMA transfer initiated by an external request supported by this LSI in DDT mode.
Synchronous DRAM
External device with DACK
MPX
Transfer Source
SRAM-type, DRAM
External device with DACK
Synchronous DRAM
SRAM-type, MPX, PCMCIA
SRAM-type, DRAM, PCMCIA,
SRAM-type, MPX, PCMCIA
7. See tables 14.8 and 14.9 for the transfer sources and transfer destinations in DMA
control SRAM, burst ROM, DRAM, and synchronous DRAM.
When performing dual address mode transfer, make the DACK output setting for the
SRAM, byte control SRAM, burst ROM, PCMCIA, or MPX interface.
*
transfer by means of an external request.
DACK output setting in dual address mode transfer
Transfer Direction (Settable Memory Interface)
*
*
Synchronous DRAM
External device with DACK
Synchronous DRAM
SRAM-type, MPX, PCMCIA
SRAM-type, DRAM, PCMCIA,
MPX
Transfer Destination
External device with DACK
SRAM-type, DRAM
SRAM-type, MPX, PCMCIA
Section 14 Direct Memory Access Controller (DMAC)
Rev.7.00 Oct. 10, 2008 Page 583 of 1074
*
*
Address
Mode
Single
Single
Single
Single
Dual
Dual
Dual
Dual
REJ09B0366-0700
Usable
DMAC
Channels
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1