HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 533

• Manufacturer Part Number: HD6417750RF240DV
• Description: MPU 3V 16K I-TEMP,PB-FREE 208-QF
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF240DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Bus State Controller (BSC)
13.3.4
DRAM Interface
Direct Connection of DRAM: When the memory type bits (DRAMTP2–0) in BCR1 are set to
100, area 3 becomes DRAM space; when set to 101, area 2 and area 3 become DRAM space. The
DRAM interface function can then be used to connect DRAM to this LSI.
16, 32, or 64 bits can be selected as the interface data width for area 3 when bits DRAMTP2–0 are
set to 100, and 16 or 32 bits can be used for both area 2 and area 3 when bits DRAMTP2–0 are set
to 101.
2-CAS 16-bit DRAMs can be connected, since CAS is used to control byte access.
Signals used for connection when DRAM is connected to area 3 are RAS, CAS0 to CAS7, and
RD/WR. CAS2 to CAS7 are not used when the data width is 16 bits. When DRAM is connected
to areas 2 and 3, the signals for area 2 DRAM connection are RAS2, CAS4 to CAS7, and RD/WR,
and those for area 3 DRAM connection are RAS, CAS0 to CAS3, and RD/WR.
In addition to normal read and write access modes, fast page mode is supported for burst access.
For DRAM connected to areas 2 and 3, EDO mode, which enables the DRAM access time to be
increased, is supported.
Rev.7.00 Oct. 10, 2008 Page 447 of 1074
REJ09B0366-0700