MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 15

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

7.6.4.2.3
7.6.4.3
7.6.4.4
7.6.4.4.1
7.6.4.4.2
7.6.4.4.3
7.6.4.4.4
7.6.4.5
7.6.4.6
7.6.4.6.1
7.6.4.6.2
7.6.4.6.3
7.6.4.6.4
7.6.4.7
7.6.4.7.1
7.6.4.7.2
7.6.4.7.3
7.6.4.8
7.6.4.8.1
7.6.4.8.2
7.6.4.8.3
7.6.5
7.6.5.1
7.6.5.2
7.6.5.3
7.7
7.7.1
7.7.2
7.7.2.1
7.7.2.2
7.7.2.3
7.8
7.8.1
7.8.2
7.8.3
7.8.4
7.8.4.1
7.8.4.2
7.8.4.3
7.8.4.4
7.8.4.5
7.8.4.6
7.8.4.7
7.8.5
7.8.5.1
Paragraph
Number
IDMA Commands (INIT_IDMA)............................................................. 7-38
Starting the IDMA .................................................................................. 7-38
Requesting IDMA Transfers .................................................................. 7-39
Internal Maximum Rate ......................................................................... 7-39
Internal Limited Rate ............................................................................. 7-39
External Burst Mode.............................................................................. 7-40
External Cycle Steal .............................................................................. 7-42
IDMA Bus Arbitration............................................................................. 7-43
IDMA Operand Transfers ...................................................................... 7-45
Dual Address Mode............................................................................... 7-45
Single Address Mode (Flyby Transfers) ................................................ 7-48
Fast-Termination Option........................................................................ 7-50
Externally Recognizing IDMA Operand Transfers................................. 7-51
Bus Exceptions...................................................................................... 7-51
Reset ..................................................................................................... 7-51
Bus Error ............................................................................................... 7-51
Retry...................................................................................................... 7-51
Ending the IDMA Transfer..................................................................... 7-52
Single Buffer Mode Termination............................................................ 7-52
Auto Buffer Mode Termination. ............................................................. 7-53
Buffer Chaining Mode Termination........................................................ 7-54
Single Buffer Examples ......................................................................... 7-55
Buffer Chaining Example....................................................................... 7-55
Auto Buffer Example ............................................................................. 7-56
SDMA Channels.................................................................................... 7-57
SDMA Bus Arbitration and Bus Transfers ............................................. 7-57
SDMA Registers.................................................................................... 7-59
SDMA Configuration Register (SDCR).................................................. 7-59
SDMA Status Register (SDSR) ............................................................. 7-61
SDMA Address Register (SDAR) .......................................................... 7-61
Serial Interface with Time Slot Assigner................................................ 7-62
One Multiplexed Channel with Static Frames ....................................... 7-69
One Multiplexed Channel with Dynamic Frames .................................. 7-69
Two Multiplexed Channels with Static Frames...................................... 7-70
Two Multiplexed Channels with Dynamic Frames................................. 7-71
Programming SI RAM Entries ............................................................... 7-72
SI RAM Programming Example ............................................................ 7-75
SI RAM Dynamic Changes.................................................................... 7-75
SI Registers........................................................................................... 7-77
SI Global Mode Register (SIGMR) ........................................................ 7-77
IDMA Examples.................................................................................... 7-55
SI Key Features.................................................................................... 7-62
TSA Overview ...................................................................................... 7-64
Enabling Connections to the TSA ........................................................ 7-67
SI RAM ................................................................................................. 7-68
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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