MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 935
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
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such as the internal cascading of two timers to form a 32-bit timer. The QUICC32 also con-
tains a periodic interval timer in the SIM60, bringing the total to five on-chip timers.
D.2.3.1 QUICC32 SERIAL CONFIGURATIONS. The QUICC32 offers an extremely flexible
set of communications capabilities. Although a full understanding of the possibilities requires
reading the appropriate sections, some of the possibilities are shown in the following dia-
grams. They show possible connections between QUICC32 devices. In addition, connec-
tions are often shown between QUICCs and the MC68302 to show the compatibility
between these devices.
For readability, transceivers are usually omitted in the following diagrams. For local on-
board communications, however, transceivers are often optional and depend on the proto-
col used.
Figure D-2 shows the Ethernet LAN capability of the QUICC32. An external SIA transceiver
is required to complete the interface to the media. This functionality is implemented in the
MC68160 enhanced Ethernet serial transceiver (EEST
connections to the attachment unit interface (AUI) or twisted-pair Ethernet formats and pro-
vides a glueless interface to the QUICC32.
Figure D-3 shows how up to six of the serial channels can connect to a TDM interface. The
QUICC32 provides a built-in time-slot assigner for access to the TDM time slots. Other chan-
nels can work with their own set of pins, allowing possibilities like an Ethernet to T1 bridge,
etc.
In an addition to this the QMC microcode emulates up to 32 channels within one SCC. The
QUICC32 can terminate all time slots in a T1 or E1/CEPT line
Freescale Semiconductor, Inc.
QUICC32
QUICC32
QUICC32
For More Information On This Product,
Figure D-2. Ethernet LAN Capability
SCC1
SCC1
SCC1
MC68360 USER’S MANUAL
Go to: www.freescale.com
ETHERNET
MC68160
MC68160
MC68160
EEST
EEST
EEST
). The MC68160 EEST supports
HUB
MC68MH360 Product Brief
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