MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 650
![IC MPU QUICC 25MHZ 357-PBGA](/photos/6/76/67680/mfg_mpc860_series_sml.jpg)
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Exar
Quantity:
160
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68360VR25VLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Serial Peripheral Interface (SPI)
The following status bits are written by the SPI after the received data has been placed into
the associated data buffer.
L—Last
OV—Overrun
ME—Multi-Master Error
Data Length
Rx Data Buffer Pointer
7.12.5.5.2 SPI Transmit Buffer Descriptor (Tx BD). Data to be transmitted with the SPI is
presented to the CP by arranging it in buffers referenced by the Tx BD ring. The first word
of the Tx BD contains status and control bits.
The following bits should be prepared by the user before transmission.
7-326
This bit is set by the SPI controller when the buffer is closed due to negation of the SPISEL
pin. This can only occur when the SPI is a slave; otherwise, the ME bit is set.
A receiver overrun occurred during reception. This error can only occur when the SPI is a
slave.
This buffer was closed because the SPISEL pin was asserted when the SPI was operating
as a master. This indicates a synchronization problem between multiple masters on the
SPI bus.
Data length is the number of octets that the CP has written into this BD’s data buffer. It is
written once by the CP as the BD is closed.
The receive buffer pointer, which always points to the first location of the associated data
buffer, must be even. The buffer may reside in either internal or external memory.
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
0 = This buffer does not contain the last character of the message.
1 = This buffer contains the last character of the message.
15
R
The actual amount of memory allocated for this buffer should be
greater than or equal to the contents of the MRBLR.
14
—
13
W
Freescale Semiconductor, Inc.
For More Information On This Product,
12
I
11
L
MC68360 USER’S MANUAL
Go to: www.freescale.com
10
—
CM
TX DATA BUFFER POINTER
NOTE
9
DATA LENGTH
—
8
—
7
—
6
—
5
—
4
—
3
—
2
UN
1
ME
0
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