MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 165
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Exar
Quantity:
160
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68360VR25VLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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5.3.3.6 BIT MANIPULATION INSTRUCTIONS. Bit manipulation operations are accom-
plished using the following instructions: bit test (BTST), bit test and set (BSET), bit test and
clear (BCLR), and bit test and change (BCHG). All bit manipulation operations can be per-
formed on either registers or memory. The bit number is specified as immediate data or in
a data register. Register operands are 32 bits, and memory operands are 8 bits. Table 5-8
is a summary of bit manipulation instructions.
Instruction
ROXR
SWAP
ROXL
ROR
ASR
ROL
ASL
LSR
LSL
# data Dn
# data Dn
# data Dn
# data Dn
# data Dn
# data Dn
# data Dn
# data Dn
Operand
Syntax
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
Freescale Semiconductor, Inc.
ea
Dn
ea
ea
ea
ea
ea
ea
ea
Table 5-7. Shift and Rotate Operations
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Operand
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Size
16
16
16
16
16
16
16
16
16
C
0
X/C
X
X/C
C
Operation
MSW
LSW
X/C
C
X/C
X
0
0
C
CPU32+
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