MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 592
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Exar
Quantity:
160
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68360VR25VLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 592 of 962
- Download datasheet (4Mb)
Serial Management Controllers (SMCs)
7.11 SERIAL MANAGEMENT CONTROLLERS (SMCS)
The SMC key features are as follows:
7.11.1 SMC Overview
The SMCs are two full-duplex ports that may be independently configured to support any
one of three protocols: UART, transparent, or GCI.
The SMCs can support simple UART operation for such purposes as providing a debug/
monitor port in an application, allowing the four SCCs to be free for another purpose. The
UART functionality of the SMCs is reduced as compared to the SCCs. The SMC clock can
be derived from one of the four internal baud rate generators or from an external clock pin.
The clock provided to the SMC should be a 16x clock.
The SMCs can also support totally transparent operation. In this mode, the SMC may be
connected to a TDM channel (such as a T1 line) or directly to its own set of pins. The receive
and transmit clocks can be derived from the TDM channel, the internal baud rate generators,
or from an external clock. In either case, the clock provided to the SMCs should be a 1x
clock. The transparent protocol also allows the use of an external synchronization pin for the
transmitter and receiver. The transparent functionality of the SMCs is reduced as compared
to the SCCs.
Finally, each SMC can support the C/I and monitor channels of the GCI bus (IOM-2). In this
case, the SMC is connected to a TDM channel in the SI. See 7.8 Serial Interface with Time
Slot Assigner for the details of configuring the GCI interfaces.
The SMCs support loopback and echo modes for testing.
7-268
• Each SMC can implement the UART protocol on its own pins.
• Each SMC can implement a totally transparent protocol on a multiplexed line or on a
• Each SMC channel fully supports the C/I and Monitor channels of the GCI (IOM-2) in
• Two SMCs fully support the two sets of C/I and Monitor channels in the SCIT channel
• Full-Duplex operation.
• Local Loopback and Echo Capability for testing.
nonmultiplexed line. This mode can also be used for a fast connection between
QUICCs.
ISDN applications.
0 and channel. 1
In the MC68302, the SMCs also provide support for the A and M
bits of the IDL definition. Since the IDL definition has been mod-
ified to eliminate the A and M bits, the QUICC does not provide
special SMC support for IDL; however, the A and M bits may still
be routed to the SMC using the TSA, if desired. The SMC would
be configured into transparent mode for this operation.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
Related parts for MC68360VR25VL
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
MC68360 MC68360 Multiple Ethernet Channels on the QUICC
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 Implementing an 8 bit Eprom for an MC68EC040-MC68360 System
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 Interfacing the MC68060 to the MC68360
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 MC68360 RAM Microcode Package Option Overview
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 MC68360 CPM-CPU Interaction
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 Interfacing SDRAM to the MC68360 QUICC Device
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 Interfacing the QUICC to a MCM516400 (4Mx4 10-12 column-row) DRAM
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 Interfacing the 68360 (QUICC) to T1-E1 Systems
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
MC68360 Multiple QUICC Design Concept
Manufacturer:
Motorola / Freescale Semiconductor
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet: