VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 109

IC PHY 10/100/1000 SGL 117-LBGA

VSC8211XVW

Manufacturer Part Number
VSC8211XVW
Description
IC PHY 10/100/1000 SGL 117-LBGA
Manufacturer
Vitesse Semiconductor Corp
Type
PHY Transceiverr
Datasheets

Specifications of VSC8211XVW

Number Of Drivers/receivers
1/1
Protocol
Gigabit Ethernet
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
117-LBGA
Case
BGA
Dc
07+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
907-1023

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23.15:12, 2:1– MAC/Media Interface Mode Select
Bits 23.15:12 and 23.2:1 are used to select the MAC interface modes and media interface modes. The reset value for these bits
is dependent upon the state of the MAC Interface bits in the CMODE hardware configuration. All combinations of these bits not
indicated below are reserved:
1
2
3
23.11:10 – RGMII/RTBI TXC Skew Selection
Bits 23.11:10 specify the amount of clock delay added to the TX_CLK line inside the VSC8211 when using an RGMII or RTBI
interface. By enabling this internal delay, a PCB “trombone” delay is not required as specified by the RGMII standard. Multiple
values are provided to compensate for PCB trace skews. The default values of these bits are specified by the RGMII Skew bits
in the CMODE hardware configuration. See Table 27,
information.
23.9:8 – RGMII/RTBI RXC Skew Selection
Bits 23.9:8 specify the amount of clock delay added to the RX_CLK line inside the VSC8211 when using an RGMII or RTBI
interface. By enabling this internal delay, a PCB “trombone” delay is not required as specified by the RGMII standard. Multiple
VMDS-10105 Revision 4.1
October 2006
Parallel MAC
PHY Operat-
ing Modes
Serial MAC
PHY Operat-
ing Modes
In this mode, the PHY does not drop the Fiber Media link if the CAT5 link comes up after the Fiber Link has been established. It is therefore not a suitable mode for
unmanaged applications. For more information on how to use this mode in managed applications, contact your Vitesse representative.
PHY registers are not supported in this mode.
In this mode, the PHY’s MAC and media interfaces are the same. Both interfaces can be either SGMII or 802.3z SerDes.
Operating
Category
Mode
0011,10
0011,01
0010,01
0010,10
0001,10
0001,01
0000,01
0000,10
0110,00
0111,01
0100,00
0101,01
1111,00
1110, 01
1110,10
1110,00
1010,01
1000,01
1001,01
1001,00
1011,00
23.15:12,
Register
23.2:1
MII
1000
0010
0011
-
0110
0111
0001
-
1001
1011
1100
-
0100
1110
1010
0000
1111
0101
1101
CMODE2
[3:0]
GMII/MII
GMII
GMII/MII
GMII/MII
RGMII
RGMII
RGMII
RGMII
TBI
TBI
RTBI
RTBI
802.3z SerDes
802.3z SerDes
802.3z SerDes
802.3z SerDes
SGMII
SGMII
Serial
SGMII
SGMII
Interface
MAC
Table 36. PHY Operating Modes
“PHY Operating Condition Parameter Description,”
CAT5
Fiber
Auto Media Sense
Auto Media Sense
CAT5
Fiber
Auto Media Sense
Auto Media Sense
CAT5
Fiber
CAT5
Fiber
CAT5
CAT5
CAT5
CAT5
CAT5
CAT5
Serial
CAT5
CAT5
109 of 165
Media Interface
2
2
Fiber Preference
CAT5 Preference
Fiber Preference
CAT5 Preference
With Clause 37 Auto-Negotiation Detection
With Clause 37 Auto-Negotiation Detection
Clause 37 disabled
Clause 37 enabled
Clause 37 enabled, Media Convertor Mode
With Clause 37 Auto-Negotiation Detection
625Mhz SCLK Clock Disabled
625MHz SCLK Clock Enabled
Buffered Mode – With Clock Recovery
Modified Clause 37 auto-negotiation disabled,
625MHz SCLK Clock Enabled
Modified Clause 37 auto-negotiation disabled,
625MHz SCLK Clock Disabled
Other Settings
1
1
on page 68 for more
Datasheet
VSC8211
3

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