VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 32

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

VMDS-10105 Revision 4.1
October 2006
LBGA
BALL
117
C7
SIGDET
RXLOS/
Signal
Name
Type
I/O
Table 11. Serial MAC/Media Interface Signals (continued)
The functionality of this signal pin depends on the value for Extended
‘SFP Mode’
CMODE Pins”
RXLOS - Receiver Loss of Signal Output (valid in SFP Mode, when
21E.15
This active high signal is asserted when the CAT5 link goes down. The pulse width of the
RXLOS signal is configurable. Refer to
SIGDET - SerDes Signal Detect (I/O) (valid in IEEE Mode, when
0).
SIGDET can be configured as an input or output and can be configured to function as
active low or active high at startup using hardware configuration or the EEPROM inter-
face. Refer to
Section 20: “EEPROM Interface”
SIGDET as Input:
When used as an input, the SIGDET signal is meant to be connected to the signal detect
output of the fiber optic transceiver. If SIGDET is high, this indicates receive activity on the
fiber optic transceiver. In input mode, SIGDET is relevant only in the following PHY Oper-
ating modes:
If SIGDET is not used as an input, the PHY internally generates the signal detect function,
from the incoming data on the TDP and TDN signal pins.
SIGDET as Output:
For Fiber media, the SIGDET behavior depends upon the input signal levels on the TDP/
TDN pins and is defined as:
For Serial MAC to CAT5 Media PHY Operating modes, SIGDET is asserted if the CAT5
link has been established.
In Parallel MAC to CAT5 Media PHY Operating Modes, SIGDET is always deasserted.
• Parallel MAC to Fiber (MII Register 23.15:12,23.2:1 = 0xx101)
• Parallel MAC to Auto Media Sense (MII Register 23.15:12,23.2:1 = 00x0xx)
• Serial to CAT5 (MII Register 23.15:12,23.2:1 = 1xxxxx)
• If the input signal amplitude is > 200mV peak-to-peak, SIGDET is asserted.
• If the input signal amplitude is <200mV, but >50mV, SIGDET is undefined.
• If the input signal amplitude is < 50mV peak-to-peak, SIGDET is deasserted.
= 1).
which is set at startup. Refer to
Section 19: “Hardware Configuration Using CMODE Pins”
and
Section 20: “EEPROM Interface”
32 of 165
for details on configuration at startup.
Description
MII Register 30.1:0
Section 19: “Hardware Configuration Using
for details on configuration at startup.
for details.
MII Register 21E.15
MII Register 21E.15
MII Register
or
Datasheet
VSC8211
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