VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 61

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

16.2 Low power state
In the low power state, all major digital blocks are powered down. However the following functionality is provided:
In this state, the PHY monitors the media interface pins for signal energy. The PHY comes out of low power state and transitions
to the Normal operating state when signal energy is detected on the media. This happens when the PHY is connected to one of
the following:
In the absence of signal energy on the media pins, the PHY will transition from the low power state to the LP Wake up state
periodically based on the programmable sleep timer. Two register bits
value of the sleep timer. The sleep timer can be programmed to 2'b00 (1sec), 2'b01 (2sec), 2'b10 (3sec) or 2'b11 (4sec). The
default value is 2 seconds. The actual sleep time duration is randomized by -80ms to +60ms to avoid two PHYs in Enhanced
ActiPHY mode from entering a lock-up state.
16.3 LP Wake up state
In this state, the PHY attempts to wake up the link partner. One complete FLP (Fast Link Pulse) is sent on both pairs A and B of
the CAT5 media. For the optical Media, a base page of all zeros (Clause 37 restart signal) is sent for 30ms.
In this state the following functionality is provided-
After sending signal energy on the relevant media, the PHY returns to the Low power state.
16.4 Normal operating state
In this state, the PHY establishes a link with a link partner. When the media is unplugged or the link partner is powered down,
the PHY waits for the duration programmed through a link status time-out timer and then enters the low power state. The Link
Status Time-out timer can be programmed to 2'b00 (1sec), 2'b01 (2sec), 2'b10 (3sec), or 2'b11 (4sec). The default value for this
timer is 2 seconds.
VMDS-10105 Revision 4.1
October 2006
• SMI interface (MDC/MODDEF1, MDIO/MODDEF2, MDINT)
• CLKOUTMAC and CLKOUTMICRO
• Auto-negotiation capable link partner
• Auto-negotiation incapable (blind/forced) 100BTX only link partner
• Auto-negotiation incapable (blind/forced) 10BT only link partner
• Auto-negotiation capable optical link partner over fiber
• Auto-negotiation incapable (blind/forced) 1000BASE-X optical link partner over fiber
• Another PHY in Enhanced ActiPHY LP Wake Up state
• SMI interface (MDC/MODDEF1, MDIO/MODDEF2, MDINT)
• CLKOUTMAC and CLKOUTMICRO
61 of 165
(MII Register bits 28.1:0)
are provided to program the
Datasheet
VSC8211