VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 91

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

4.6:5 - Advertise 1000BASE-X Capability
Bits 4.6:5 control the 1000BASE-X capability advertisement transmitted to the link partner for both fiber and copper media.
Changing these bits in Clause-37 view will also change MII Register bits 9.9:8 in Clause-28 view.
4.4:0 - Reserved
25.3.6 Register 5 (05h) – Auto-Negotiation Link Partner Ability Register
25.3.6.3 Clause 28 View
5.15 – LP Next-Page Transmit Request
Bit 5.15 returns a “1” when the Link Partner implements the Next-Page function and has Next-Page information it wants to
transmit. The state of this bit is valid when the
current media type is CAT-5 copper.
5.14 – LP Acknowledge
Bit 5.14 returns a “1” when the Link Partner signals that it has successfully received the Link Code Word from the local PHY. The
local PHY uses this bit for proper Link Code Word exchange, as defined in Clause 28 of IEEE 802.3.
5.13 – LP Remote Fault
Bit 5.13 returns a “1” when the Link Partner signals that a remote fault (from its perspective) has occurred. The local PHY does
not otherwise use this bit. Note that IEEE Clause-37 provides for two remote fault bits, while Clause-28 provides only a single
remote fault bit. This difference is handled in Extended MII Register bits
Remote Fault Mapping
5.12 – Reserved
5.11 – LP Asymmetric Pause Capability
The LP Asymmetric Pause Capability bit indicates whether the Link Partner has asymmetric pause capability. The state of this
bit is valid when the
5.10 – LP Symmetric Pause Capability
The LP Symmetric Pause Capability bit indicates whether the Link Partner supports symmetric pause frame capability. This bit
is used by the Link Partner’s MAC to communicate symmetric pause capability to the local MAC. It has no effect on PHY
operation. The state of this bit is valid when the
VMDS-10105 Revision 4.1
October 2006
Bit
15
14
13
12
11
10
9
8
7
6
5
4:0
Register 5 (05h) – Auto-Negotiation Link Partner Ability Register - Clause 28 View
Name
LP Next-Page Transmit Request
LP Acknowledge
LP Remote Fault
Reserved
LP Asymmetric Pause Capability
LP Symmetric Pause Capability
LP Advertise 100BASE-T4 Capability RO
LP Advertise 100BASE-TX FDX
LP Advertise 100BASE-TX HDX
LP Advertise 10BASE-T FDX
LP Advertise 10BASE-T HDX
LP Advertise Selector Field
Auto-Negotiation Complete bit (1.5)
OR. The state of this bit is valid when the
Auto-Negotiation Complete bit (1.5)
Access
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Auto-Negotiation Complete bit (1.5)
is set.
States
1 = LP NP transmit request
1 = LP acknowledge
1 = LP remote fault
1 = LP Advertise Asymmetric Pause capable 0
1 = LP Advertise Symmetric Pause capable
1 = LP Advertise 100BASE-T4 capable
1 = LP 100BASE-TX FDX capable
1 = LP 100BASE-TX HDX capable
1 = LP 10BASE-T FDX capable
1 = LP 10BASE-T HDX capable
LP Advertise Selector Field
91 of 165
Auto-Negotiation Complete bit (1.5)
16E.2:1 - Remote Fault Mapping Mask
or the
is set.
Page Received bit (6.1)
is set.
Reset Value
0
0
0
0
0
0
0
0
0
0
00000
is set, and the
Datasheet
and
VSC8211
Sticky
16E.0 -