VSC8211XVW Vitesse Semiconductor Corp, VSC8211XVW Datasheet - Page 156

• Manufacturer Part Number: VSC8211XVW
• Description: IC PHY 10/100/1000 SGL 117-LBGA
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8211XVW

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 117-LBGA
• Case: BGA
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1023

30.12 REFCLK Timing
The following specifications are valid only when the VDD33A is at 3.3V, ±5%. For more information about clocking and
frequency offset tolerance specifications when jumbo packet support is required, see the application note Using Jumbo Packets
with SimpliPHYs.
VMDS-10105 Revision 4.1
October 2006
t
t
R/F (REFCLK125)
R/F (REFCLK25)
T
J
T
J
F
Symbol
REFCLK125
REFCLK125
REFCLK25,
REFCLK25
STABILITY
T
DUTY
REFCLK
Min
40
Typ
80%
20%
t
40
50
R
8
, t
F
Figure 48. REFCLK AC Timing
Table 71. REFCLK Timing
Max
300
50
60
4
1
T
REFCLK
156 of 165
Unit
ppm
ns
ns
ps
ns
ns
%
Reference clock period, PLLMODE = 0 (25MHz
reference).
Reference clock period, PLLMODE = 1 (125MHz
reference).
Reference clock frequency stability (0°C to 70°C).
REFCLK duty cycle in both 25MHz and 125MHz
modes.
Total jitter of 25MHz or 125MHz reference clock (peak-
to-peak).
Reference clock rise time, 25MHz mode (20% to
80%).
Reference clock rise time, 125MHz mode (20% to
80%).
T
DUTY
Parameter Description & Conditions
Datasheet
VSC8211