PI7C8140AMAE Pericom Semiconductor, PI7C8140AMAE Datasheet - Page 68

• Manufacturer Part Number: PI7C8140AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 128-QFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8140AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 128-QFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 230 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

07-0067
13.2.29 SUBSYSTEM VENDOR ID REGISTER – OFFSET 40h
13.2.30 SUBSYSTEM ID REGISTER – OFFSET 40h
13.2.31 DIAGNOSTIC/CHIP CONTROL REGISTER – OFFSET 44h
Bit
24
25
26
27
31-28
Bit
15:0
Bit
31:16
Bit
0
Function
Primary Master
Timeout
Secondary
Master Timeout
Master Timeout
Status
Discard Timer
P_SERR#
enable
Reserved
Function
Subsystem
Vendor ID
Function
Subsystem ID
Function
Reserved
Type
R/W
RW
RWC
RW
RO
Type
RW
Type
RW
Type
RO
Reserved. Returns 0 when read. Reset to 0.
Description
Determines the maximum number of PCI clock cycles the bridge waits for an
initiator on the primary interface to repeat a delayed transaction request.
0: Primary discard timer counts 2
1: Primary discard timer counts 2
Reset to 0
Determines the maximum number of PCI clock cycles the bridge waits for an
initiator on the secondary interface to repeat a delayed transaction request.
0: Secondary discard timer counts 2
1: Secondary discard timer counts 2
Reset to 0
This bit is set to 1 when either the primary master timeout counter or secondary
master timeout counter expires.
Reset to 0
This bit is set to 1 and P_SERR# is asserted when either the primary discard timer
or the secondary discard timer expire.
0: P_SERR# is not asserted on the primary interface as a result of the expiration
of either the Primary Discard Timer or the Secondary Discard Timer.
1: P_SERR# is asserted on the primary interface as a result of the expiration of
either the Primary Discard Timer or the Secondary Discard Timer.
Reset to 0
Description
Subsystem Vendor ID for add-in card manufacturers.
Reset to 0
Description
Subsystem ID for add-in card manufacturers.
Reset to 0
Description
Reserved. Returns 0 when read. Reset to 0
Page 68 of 82
15
10
PCI clock cycles.
PCI clock cycles.
15
10
PCI clock cycles.
PCI clock cycles.
2-PORT PCI-TO-PCI BRIDGE
March 20, 2007 – Revision 1.01
PI7C8140A