PI7C8140AMAE Pericom Semiconductor, PI7C8140AMAE Datasheet - Page 76

• Manufacturer Part Number: PI7C8140AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 128-QFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8140AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 128-QFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 230 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

07-0067
13.2.40 CAPABILITY ID REGISTER – OFFSET 80h
13.2.41 NEXT ITEM POINTER REGISTER – OFFSET 80h
13.2.42 POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET 80h
Bit
9
10
11
15:12
Bit
7:0
Bit
15:8
Bit
18:16
19
20
21
24:22
25
26
31:27
Function
Enable Long
Request
Enable
Secondary To
Hold Request
Longer
Enable Primary
To Hold
Request Longer
Reserved
Function
Enhanced
Capabilities ID
Function
Next Item
Pointer
Function
Power
Management
Revision
PME# Clock
Auxiliary
Power
Device Specific
Initialization
Reserved
D1 Power State
Support
D2 Power State
Support
PME# Support
Type
RW
RW
RW
RO
Type
RO
Type
RO
Type
RO
RO
RO
RO
RO
RO
RO
RO
Reserved. Returns 0 when read. Reset to 0.
Description
Controls bridge’s ability to enable long requests for lock cycles
0: normal lock operation
1: enable long request for lock cycle
Reset to 0
Control’s bridge’s ability to enable the secondary bus to hold requests longer.
0: internal secondary master will release REQ# after FRAME# assertion
1: internal secondary master will hold REQ# until there is no transactions pending
in FIFO or until terminated by target
Reset to 1
Control’s bridge’s ability to hold requests longer at the Primary Port.
0: internal Primary master will release REQ# after FRAME# assertion
1: internal Primary master will hold REQ# until there is no transactions pending
in FIFO or until terminated by target
Reset to 1
Description
Read as 01h to indicate that these are power management enhanced capability
registers.
Description
Read as 90h. No other ECP registers.
Description
Read as 010 to indicate the device is compliant to Revision 1.1 of PCI Power
Management Interface Specifications.
Read as 0 to indicate bridge does not support the PME# pin.
Read as 0 to indicate bridge does not support the PME# pin or an auxiliary power
source.
Read as 0 to indicate bridge does not have device specific initialization
requirements.
Read as 0
Read as 1 to indicate bridge supports the D1 power management state.
Read as 1 to indicate bridge supports the D2 power management state.
Read as 0 to indicate bridge does not support the PME# pin.
Page 76 of 82
2-PORT PCI-TO-PCI BRIDGE
March 20, 2007 – Revision 1.01
PI7C8140A