PI7C8140AMAE Pericom Semiconductor, PI7C8140AMAE Datasheet - Page 80

• Manufacturer Part Number: PI7C8140AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 128-QFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8140AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 128-QFP
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 230 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

07-0067
14.3 AC SPECIFICATIONS
Figure 14-1
1. See Figure 14-1 PCI Signal Timing Measurement Conditions.
2. All primary interface signals are synchronized to P_CLK. All secondary interface signals are
synchronized to S_CLKOUT.
3. Point-to-point signals are P_REQ#, S_REQ#[3:0], P_GNT#, S_GNT#[3:0], LOO, and ENUM#.
Bused signals are P_AD, P_CBE#, P_PAR, P_PERR#, P_SERR#, P_FRAME#, P_IRDY#, P_TRDY#,
P_LOCK#, P_DEVSEL#, P_STOP#, P_IDSEL, S_AD, S_CBE#, S_PAR, S_PERR#, S_SERR#,
S_FRAME#, S_IRDY#, S_TRDY#, S_LOCK#, S_DEVSEL#, and S_STOP#.
4. REQ# signals have a setup of 10ns and GNT# signals have a setup of 12ns.
Symbol
Tsu
Tsu(ptp)
Th
Tval
Tval(ptp)
Ton
Toff
Parameter
Input setup time to CLK – bused signals
Input setup time to CLK – point-to-point
Input signal hold time from CLK
CLK to signal valid delay – bused signals
CLK to signal valid delay – point-to-point
Float to active delay
Active to float delay
PCI Signal Timing Measurement Conditions
1,2
1,2
1,2
Page 80 of 82
1,2,3
1,2,3
1,2,3
1,2,3
Min.
3
5
0
2
2
2
-
66 MHz
Max.
-
-
-
6
6
-
14
2-PORT PCI-TO-PCI BRIDGE
March 20, 2007 – Revision 1.01
Min.
7
10, 12
0
2
2
2
-
33 MHz
4
Max.
-
-
-
11
12
-
28
PI7C8140A
Units
ns