cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 161
cx28500
Manufacturer Part Number
cx28500
Description
Cx28500 Multichannel Synchronous Communications Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28500.pdf
(224 pages)
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8.3.5.4
A short COFA interrupt is generated for any transparent mode message whose reception is ended due to a COFA
error and for which no data was transferred from RSLP to RDMA or to shared memory. In this case, no other
indication is provided for this errored message, thus saving PCI bandwidth and Host buffers.
Reason:
•
Effects:
•
•
•
Channel Level Recovery Actions:
•
28500-DSH-002-C
Signal failure, glitch or realignment caused by the physical interface sourcing the RSYNC or STB input signal.
RxSHT Interrupt (if IDLEIEN = 1 in
RSLP restarts channel operation as soon as the COFA condition is recovered and the channel reaches its first
assigned time slot.
RDMA is not affected and continues shared memory buffer processing. Notice that no shared memory buffer
descriptors are consumed.
None required.
NOTE:
Short COFA (SHT COFA)
Only transparent mode COFA creates such a scenario. The exact scenario is as follows: a
COFA condition happens within the next few bytes after an abnormal message termination
(i.e., a prior COFA or overflow error) or after a channel activation.
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Section
6.6.2).
®
Basic Operations
146
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