cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 214

• Manufacturer Part Number: cx28500
• Description: Cx28500 Multichannel Synchronous Communications Controller
• Manufacturer: Mindspeed Technologies

Figure E-4.
Table E-5.
E.2.3
The Master generates clock, data, Frame sync Strobe signal, and the Stuff signal (TSB_RSTUFF). The Master
generates an all ones stuff pattern in place of the payload data during the same time slot that the Receive Stuff
signal (TSB_RSTUFF) is active. The Master generates control and data outputs synchronously with the rising edge
of TSB_CLK. The nominal clock frequency is 51.84 MHz.
28500-DSH-002-C
FOOTNOTE:
(1)
(2)
If port frequency is less than 13 MHz.
If port frequency is more than 13 MHz.
Label
TSB_TSTUFF
t
t
t
t
dc
fc
s
h
TSB_TDAT
TSB_CLK
Clock Frequency
Duty Cycle
Setup, TSB_TDAT to rising edge of TSB_CLK
Hold, TSB_TDAT from rising edge of TSB_CLK
Payload Time Slot Bus Transmit Stuff Indicator (TSB_TSTUFF)
Transmit Timing Values
Receive Timing
Byte 1 Byte 2 Byte 3 Byte 4 Byte 5
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Bit
7
Description
The Byte arriving 8 time slots (Bytes) after TSB_STUFF
Bit
6
Time Slot #N (8 Bits of Serial Data)
Bit
5
is expected to be stuffed
Figure E-5
Bit
4
Bit
3
®
shows the timing requirements for the receive
Byte 6
Bit
2
Byte 7
t
Bit
dc
1
/52 MHz
15
15
40%
Min
2
3
(2)
(2)
(1)
(1)
Byte 8
LSB
Bit
0
Stuffed
Time
Slot
t
dc
/52 MHz
Max
60%
—
—
500052_034
TSBUS
Unit
ns
—
ns
ns
199