MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 120
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
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Central Processor Unit (CPU)
Technical Data
120
NOTE:
To maintain M6805 compatibility, the upper byte of the index register (H)
is not stacked automatically. If the interrupt service routine modifies H,
then the user must stack and unstack H using the PSHH and PULH
instructions.
N — Negative Flag
Z — Zero Flag
C — Carry/Borrow Flag
After the I bit is cleared, the highest-priority interrupt request is
serviced first.
A return-from-interrupt (RTI) instruction pulls the CPU registers from
the stack and restores the interrupt mask from the stack. After any
reset, the interrupt mask is set and can be cleared only by the clear
interrupt mask software instruction (CLI).
The CPU sets the negative flag when an arithmetic operation, logic
operation, or data manipulation produces a negative result, setting bit
7 of the result.
The CPU sets the zero flag when an arithmetic operation, logic
operation, or data manipulation produces a result of $00.
The CPU sets the carry/borrow flag when an addition operation
produces a carry out of bit 7 of the accumulator or when a subtraction
operation requires a borrow. Some instructions, such as bit test and
branch, shift, and rotate, also clear or set the carry/borrow flag.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Negative result
0 = Non-negative result
1 = Zero result
0 = Non-zero result
1 = Carry out of bit 7
0 = No carry out of bit 7
Central Processor Unit (CPU)
Go to: www.freescale.com
MC68HC908AS60 — Rev. 1.0
MOTOROLA
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