MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 320

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MC68HC908AS60MFN

Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Input/Output (I/O) Ports
20.9 Port G
20.9.1 Port G Data Register
Technical Data
320
NOTE:
Address:
When bit DDRFx is a logic 1, reading address $0009 reads the PTFx
data latch. When bit DDRFx is a logic 0, reading address $0009 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port F pins.
Port G is a 3-bit, general-purpose, bidirectional I/O port.
The pins of port G are available only in the 64-pin QFP.
The port G data register (PTG) contains a data latch for each of the three
port G pins.
X = Don’t care
Hi-Z = High impedance
1. Writing affects data register, but does not affect input.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
DDRF
Bit
For More Information On This Product,
0
1
$000A
Bit 7
R
R
0
Go to: www.freescale.com
Figure 20-20. Port G Data Register (PTG)
Input/Output (I/O) Ports
PTF
Bit
= Reserved
X
X
R
6
0
Table 20-6. Port F Pin Functions
Input, Hi-Z
I/O Pin
Output
Mode
R
5
0
Unaffected by reset
R
4
0
Read/Write
DDRF[6:0]
DDRF[6:0]
Accesses
to DDRF
R
3
0
MC68HC908AS60 — Rev. 1.0
Table 20-6
PTG2
PTF[6:0]
Read
2
Accesses to PTF
Pin
PTG1
summarizes
1
MOTOROLA
PTF[6:0]
PTF[6:0]
Write
PTG0
Bit 0
(1)

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