MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 244

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

Serial Communications Interface (SCI)
Technical Data
244
NOTE:
WAKE — Wakeup Condition Bit
ILTY — Idle Line Type Bit
PEN — Parity Enable Bit
PTY — Parity Bit
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
This read/write bit determines which condition wakes up the SCI: a
logic 1 (address mark) in the most significant bit position of a received
character or an idle condition on the RxD pin. Reset clears the WAKE
bit.
This read/write bit determines when the SCI starts counting logic 1s
as idle character bits. The counting begins either after the start bit or
after the stop bit. If the count begins after the start bit, then a string of
logic 1s preceding the stop bit may cause false recognition of an idle
character. Beginning the count after the stop bit avoids false idle
character recognition, but requires properly synchronized
transmissions. Reset clears the ILTY bit.
This read/write bit enables the SCI parity function. (See
When enabled, the parity function inserts a parity bit in the most
significant bit position. (See
This read/write bit determines whether the SCI generates and checks
for odd parity or even parity. (See
bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Address mark wakeup
0 = Idle line wakeup
1 = Idle character bit count begins after stop bit.
0 = Idle character bit count begins after start bit.
1 = Parity function enabled
0 = Parity function disabled
1 = Odd parity
0 = Even parity
Serial Communications Interface (SCI)
Go to: www.freescale.com
Table
Table
17-4.) Reset clears the PEN bit.
17-5.) Reset clears the PTY
MC68HC908AS60 — Rev. 1.0
Table
MOTOROLA
17-5.)