MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 370

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

Byte Data Link Controller-Digital (BDLC-D)
21.7.4 BDLC State Vector Register
Technical Data
370
Address:
This register is provided to substantially decrease the CPU overhead
associated with servicing interrupts while under operation of a multiplex
protocol. It provides an index offset that is directly related to the BDLC’s
current state, which can be used with a user-supplied jump table to
rapidly enter an interrupt service routine. This eliminates the need for the
user to maintain a duplicate state machine in software.
I0, I1, I2, and I3 — Interrupt Source Bits
Reset:
BSVR
Read:
Write:
$0C
$1C
$00
$04
$08
$10
$14
$18
$20
These bits indicate the source of the interrupt request that currently is
pending. The encoding of these bits are listed in
Freescale Semiconductor, Inc.
For More Information On This Product,
Byte Data Link Controller-Digital (BDLC-D)
$003E
Figure 21-20. BDLC State Vector Register (BSVR)
Bit 7
I3
0
0
0
0
0
0
0
0
1
0
0
Go to: www.freescale.com
I2
0
0
0
0
1
1
1
1
0
= Unimplemented
Table 21-5. BDLC Interrupt Sources
I1
0
0
1
1
0
0
1
1
0
6
0
0
I0
0
1
0
1
0
1
0
1
0
Cyclical redundancy check (CRC) error
I3
BDLC Tx data register empty (TDRE)
5
0
BDLC Rx data register full (RDRF)
Symbol invalid or out of range
Received IFR byte (RXIFR)
No interrupts pending
I2
Loss of arbitration
4
0
Interrupt Source
Received EOF
Wakeup
I1
3
0
MC68HC908AS60 — Rev. 1.0
I0
2
0
Table
21-5.
1
0
0
MOTOROLA
8 (highest)
0 (lowest)
Priority
1
2
3
4
5
6
7
Bit 0
0
0