MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 141

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

9.4.2.2 Computer Operating Properly (COP) Reset
9.4.2.3 Illegal Opcode Reset
9.4.2.4 Illegal Address Reset
MC68HC908AS60 — Rev. 1.0
MOTOROLA
CGMXCLK
CGMOUT
PORRST
OSC1
RST
IAB
The overflow of the COP counter causes an internal reset and sets the
COP bit in the SIM reset status register (SRSR) if the COPD bit in the
CONFIG-1 register is at logic 0. See
Properly (COP)
The SIM decodes signals from the CPU to detect illegal instructions. An
illegal instruction sets the ILOP bit in the SIM reset status register
(SRSR) and causes a reset.
If the stop enable bit, STOP, in the CONFIG-1 register is logic 0, the SIM
treats the STOP instruction as an illegal opcode and causes an illegal
opcode reset.
An opcode fetch from an unmapped address generates an illegal
address reset. The SIM verifies that the CPU is fetching an opcode prior
to asserting the ILAD bit in the SIM reset status register (SRSR) and
resetting the MCU. A data fetch from an unmapped address using
CYCLES
Freescale Semiconductor, Inc.
4096
For More Information On This Product,
Figure 9-7. POR Recovery
System Integration Module (SIM)
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Go to: www.freescale.com
32
Module.
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32
Section 14. Computer Operating
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System Integration Module (SIM)
Reset and System Initialization
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Technical Data
141