MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 308
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
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Input/Output (I/O) Ports
20.5 Port C
20.5.1 Port C Data Register
Technical Data
308
NOTE:
Functions:
Address:
Alternate
When bit DDRBx is a logic 1, reading address $0001 reads the PTBx
data latch. When bit DDRBx is a logic 0, reading address $0001 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port B pins.
Port C is a 6-bit, general-purpose, bidirectional I/O port.
The port C data register (PTC) contains a data latch for each of the five
port C pins.
The pin associated with PTC5 is availble only in the 64-pin quad flat pack
(QFP).
X = Don’t care
Hi-Z = High impedance
1. Writing affects data register, but does not affect input.
DDRB
Reset:
Read:
Write:
Bit
Freescale Semiconductor, Inc.
0
1
For More Information On This Product,
$0002
Bit 7
R
R
R
0
PTB
Bit
X
X
Go to: www.freescale.com
Figure 20-8. Port C Data Register (PTC)
Input/Output (I/O) Ports
= Reserved
R
R
Table 20-2. Port B Pin Functions
6
0
Input, Hi-Z
I/O Pin
Output
Mode
PTC5
R
5
Accesses to DDRB
Unaffected by reset
PTC4
Read/Write
DDRB[7:0]
DDRB[7:0]
R
4
PTC3
R
3
MC68HC908AS60 — Rev. 1.0
Table 20-2
MCLK
PTC2
PTB[7:0]
2
Read
Accesses to PTB
Pin
PTC1
summarizes
R
1
MOTOROLA
PTB[7:0]
PTB[7:0]
Write
PTC0
Bit 0
R
(1)
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