MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 79
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 79 of 454
- Download datasheet (6Mb)
5.4 FLASH Control Register
MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
Address:
Programming tools are available from Motorola. Contact a local Motorola
representative for more information.
A security feature prevents viewing of the FLASH contents.
The FLASH-2 control register (FLCR2) controls FLASH-2 program,
erase, and margin read operations.
FDIV1 — Frequency Divide Control Bit
FDIV0 — Frequency Divide Control Bit
BLK1 — Block Erase Control Bit
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Reset:
Read:
Write:
This read/write bit together with FDIV0 selects the factor by which the
charge pump clock is divided from the system clock. See
Charge Pump Frequency
This read/write bit together with FDIV1 selects the factor by which the
charge pump clock is divided from the system clock. See
Charge Pump Frequency
This read/write bit together with BLK0 allows erasing of blocks of
varying size. See
available block sizes.
Freescale Semiconductor, Inc.
For More Information On This Product,
$FE11
FDIV1
Bit 7
0
Figure 5-1. FLASH-2 Control Register (FLCR2)
Go to: www.freescale.com
FDIV0
FLASH-2 Memory
6
0
5.6 FLASH Erase Operation
BLK1
5
0
Control.
Control.
BLK0
4
0
HVEN
3
0
MARGIN
2
0
for a description of
FLASH Control Register
FLASH-2 Memory
ERASE
1
0
Technical Data
(1)
5.5 FLASH
5.5 FLASH
PGM
Bit 0
0
79
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