MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 283

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

18.14.1 SPI Control Register
MC68HC908AS60 — Rev. 1.0
MOTOROLA
Address:
The SPI control register:
SPRIE — SPI Receiver Interrupt Enable Bit
SPMSTR — SPI Master Bit
Reset:
Read:
Write:
•
•
•
•
•
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This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
This read/write bit selects master mode operation or slave mode
operation. Reset sets the SPMSTR bit.
Freescale Semiconductor, Inc.
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1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
1 = Master mode
0 = Slave mode
Enables SPI module interrupt requests
Selects CPU interrupt requests
Configures the SPI module as master or slave
Selects serial clock polarity and phase
Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
Enables the SPI module
SPRIE
$0010
Bit 7
R
0
Serial Peripheral Interface (SPI)
Figure 18-12. SPI Control Register (SPCR)
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= Reserved
R
6
0
SPMSTR
5
1
CPOL
4
0
CPHA
3
1
Serial Peripheral Interface (SPI)
SPWOM
2
0
SPE
1
0
Technical Data
I/O Registers
SPTIE
Bit 0
0
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