MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 173

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

10.6.3 PLL Programming Register
MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
Address:
The PLL programming register (PPG) contains the programming
information for the modulo feedback divider and the programming
information for the hardware configuration of the VCO.
MUL7–MUL4 — Multiplier Select Bits
The multiplier select bits have built-in protection that prevents them from
being written when the PLL is on (PLLON = 1).
Reset:
Read:
Write:
These read/write bits control the modulo feedback divider that selects
the VCO frequency multiplier, N. (See
10.4.2.4 Programming the
bits configures the modulo feedback divider the same as a value
of $1. Reset initializes these bits to $6 to give a default multiply
value of 6.
Freescale Semiconductor, Inc.
For More Information On This Product,
$001E
MUL7
MUL7:MUL6:MUL5:MUL4
Table 10-2. VCO Frequency Multiplier (N) Selection
Bit 7
0
Figure 10-6. PLL Programming Register (PPG)
Clock Generator Module (CGM)
Go to: www.freescale.com
MUL6
0000
0001
0010
0011
1101
1110
1111
6
1
MUL5
5
1
PLL.) A value of $0 in the multiplier select
MUL4
4
0
VCO Frequency Multiplier (N)
VRS7
10.4.2.1 Circuits
3
0
Clock Generator Module (CGM)
13
14
15
VRS6
1
1
2
3
2
1
VRS5
CGM Registers
1
1
Technical Data
and
VRS4
Bit 0
0
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