MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 65

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

4.4 FLASH-1 Control Register
MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
Address:
The row architecture for this array is:
Programming tools are available from Motorola. Contact a local Motorola
representative for more information.
A security feature prevents viewing of the FLASH contents.
The FLASH-1 control register (FLCR1) controls FLASH-1 program,
erase, and margin read operations.
FDIV1 — Frequency Divide Control Bit
FDIV0 — Frequency Divide Control Bit
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Reset:
Read:
Write:
•
•
•
•
•
This read/write bit together with FDIV0 selects the factor by which the
charge pump clock is divided from the system clock. See
Charge Pump Frequency
This read/write bit together with FDIV1 selects the factor by which the
charge pump clock is divided from the system clock. See
Charge Pump Frequency
Freescale Semiconductor, Inc.
For More Information On This Product,
$8000–$803F (Row 0)
$8040–$807F (Row 1)
$8080–$80BF (Row 2)
--------------------------------------
$FFC0–$FFFF (Row 511)
$FE0B
FDIV1
Bit 7
0
Figure 4-1. FLASH-1 Control Register (FLCR1)
Go to: www.freescale.com
FDIV0
FLASH-1 Memory
6
0
BLK1
5
0
Control.
Control.
BLK0
4
0
HVEN
3
0
MARGIN
FLASH-1 Control Register
2
0
FLASH-1 Memory
ERASE
1
0
Technical Data
(1)
4.5 FLASH
4.5 FLASH
PGM
Bit 0
0
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