MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 388
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MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 388 of 454
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Timer Interface Module A (TIMA-6)
22.4.4.3 PWM Initialization
Technical Data
388
NOTE:
initially control the pulse width on the PTF2 pin. Writing to the TIMA
channel 5 registers enables the TIMA channel 5 registers to
synchronously control the pulse width at the beginning of the next PWM
period. At each subsequent overflow, the TIMA channel registers (4 or
5) that control the pulse width are the ones written to last. TASC4
controls and monitors the buffered PWM function, and TIMA channel 5
status and control register (TASC5) is unused. While the MS4B bit is set,
the channel 5 pin, PTF3, is available as a general-purpose I/O pin.
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
To ensure correct operation when generating unbuffered or buffered
PWM signals, use this initialization procedure:
1. In the TIMA status and control register (TASC):
2. In the TIMA counter modulo registers (TAMODH–TAMODL), write
3. In the TIMA channel x registers (TACHxH–TACHxL), write the
4. In TIMA channel x status and control register (TSCx):
Freescale Semiconductor, Inc.
For More Information On This Product,
the value for the required PWM period.
value for the required pulse width.
a. Stop the TIMA counter by setting the TIMA stop bit, TSTOP.
b. Reset the TIMA counter by setting the TIMA reset bit, TRST.
a. Write 0:1 (for unbuffered output compare or PWM signals) or
b. Write 1 to the toggle-on-overflow bit, TOVx.
c. Write 1:0 (to clear output on compare) or 1:1 (to set output on
Timer Interface Module A (TIMA-6)
1:0 (for buffered output compare or PWM signals) to the
mode select bits, MSxB–MSxA. (See
compare) to the edge/level select bits, ELSxB–ELSxA. The
output action on compare must force the output to the
complement of the pulse width level. (See
Go to: www.freescale.com
MC68HC908AS60 — Rev. 1.0
Table
Table
22-2.)
22-2.)
MOTOROLA
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