MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 305

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
DDRA[7:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 20-4
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
X = Don’t care
Hi-Z = High impedance
1. Writing affects data register, but does not affect input.
These read/write bits control port A data direction. Reset clears
DDRA[7:0], configuring all port A pins as inputs.
DDRA
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
Go to: www.freescale.com
shows the port A I/O logic.
Input/Output (I/O) Ports
PTA
Bit
X
X
Table 20-1. Port A Pin Functions
Figure 20-4. Port A I/O Circuit
RESET
Input, Hi-Z
I/O Pin
Output
Mode
DDRAx
PTAx
Read/Write
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
Table 20-1
PTA[7:0]
Read
Accesses to PTA
Input/Output (I/O) Ports
Pin
summarizes
Technical Data
PTA[7:0]
PTA[7:0]
Write
Port A
PTAx
(1)
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