MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 187

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

12.4.1 Flag Protection During Break Interrupts
12.4.2 CPU During Break Interrupts
12.4.3 TIM During Break Interrupts
MC68HC908AS60 — Rev. 1.0
MOTOROLA
$FE0C
$FE0D
$FE0E
Addr.
Break Address Register High
Break Address Register Low
Break Status and Control
Register (BSCR)
Register Name
See page 190.
See page 190.
See page 189.
(BRKH)
(BRKL)
The BCFE bit in the break flag control register (BFCR) enables software
to clear status bits during the break state.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counter.
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 12-2. I/O Register Summary
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and
$FEFD in monitor mode)
BRKE
Bit 15
Bit 7
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Bit 7
0
0
0
Break Module
= Unimplemented
BRKA
14
6
0
6
0
0
13
5
0
5
0
0
0
12
4
0
4
0
0
0
11
3
0
3
0
0
0
10
2
0
2
0
0
0
Functional Description
Technical Data
1
9
0
1
0
0
0
Break Module
Bit 0
Bit 8
Bit 0
0
0
0
0
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