MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 319
MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 319 of 454
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20.8.2 Data Direction Register F
MC68HC908AS60 — Rev. 1.0
MOTOROLA
NOTE:
Address:
Data direction register F (DDRF)determines whether each port F pin is
an input or an output. Writing a logic 1 to a DDRF bit enables the output
buffer for the corresponding port F pin; a logic 0 disables the output
buffer.
DDRF[6:0] — Data Direction Register F Bits
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
Figure 20-19
Reset:
Read:
Write:
These read/write bits control port F data direction. Reset clears
DDRF[6:0], configuring all port F pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
READ DDRF ($000D)
WRITE DDRF ($000D)
WRITE PTF ($0009)
READ PTF ($0009)
$000D
Bit 7
Figure 20-18. Data Direction Register F (DDRF)
R
R
0
0
Go to: www.freescale.com
shows the port F I/O logic.
Input/Output (I/O) Ports
= Reserved
DDRF6
6
0
Figure 20-19. Port F I/O Circuit
RESET
DDRF5
5
0
DDRF4
DDRFx
PTFx
4
0
DDRF3
3
0
DDRF2
2
0
Input/Output (I/O) Ports
DDRF1
1
0
Technical Data
DDRF0
Bit 0
Port F
0
PTFx
319
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