MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 171

• Manufacturer Part Number: MC68HC908AS60MFN
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

10.6.2 PLL Bandwidth Control Register
MC68HC908AS60 — Rev. 1.0
MOTOROLA
Address:
The PLL bandwidth control register (PBWC):
AUTO — Automatic Bandwidth Control Bit
LOCK — Lock Indicator Bit
Reset:
Read:
Write:
•
•
•
•
This read/write bit selects automatic or manual bandwidth control.
When initializing the PLL for manual operation (AUTO = 0), clear the
ACQ bit before turning on the PLL. Reset clears the AUTO bit.
When the AUTO bit is set, LOCK is a read-only bit that becomes set
when the VCO clock, CGMVCLK, is locked (running at the
programmed frequency). When the AUTO bit is clear, LOCK reads as
logic 0 and has no meaning. Reset clears the LOCK bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Automatic bandwidth control
0 = Manual bandwidth control
1 = VCO frequency correct or locked
0 = VCO frequency incorrect or unlocked
Figure 10-5. PLL Bandwidth Control Register (PBWC)
Selects automatic or manual (software-controlled) bandwidth
control mode
Indicates when the PLL is locked
In automatic bandwidth control mode, indicates when the PLL is in
acquisition or tracking mode
In manual operation, forces the PLL into acquisition or tracking
mode
$001D
AUTO
Bit 7
0
Clock Generator Module (CGM)
Go to: www.freescale.com
= Unimplemented
LOCK
6
0
ACQ
5
0
XLD
4
0
3
0
0
Clock Generator Module (CGM)
2
0
0
CGM Registers
1
0
0
Technical Data
Bit 0
0
0
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