MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 313

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MC68HC908AS60MFN

Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC908AS60 — Rev. 1.0
MOTOROLA
Figure 20-13
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx
data latch. When bit DDRDx is a logic 0, reading address $0003 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port D pins.
X = Don’t care
Hi-Z = High impedance
1. Writing affects data register, but does not affect input.
DDRD
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTD
Bit
X
X
Go to: www.freescale.com
shows the port D I/O logic.
Input/Output (I/O) Ports
Input, Hi-Z
I/O Pin
Output
Table 20-4. Port D Pin Functions
Mode
Figure 20-13. Port D I/O Circuit
RESET
Read/Write
DDRD[7:0]
DDRD[7:0]
Accesses
to DDRD
DDRDx
PTDx
PTD[7:0]
Table 20-4
Read
Pin
Accesses to PTD
Input/Output (I/O) Ports
summarizes
PTD[7:0]
Technical Data
PTD[7:0]
Write
Port D
(1)
PTDx
313

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