MC68HC908AS60MFN MOTOROLA [Motorola, Inc], MC68HC908AS60MFN Datasheet - Page 318
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MC68HC908AS60MFN
Manufacturer Part Number
MC68HC908AS60MFN
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AS60MFN.pdf
(454 pages)
- Current page: 318 of 454
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Input/Output (I/O) Ports
20.8 Port F
20.8.1 Port F Data Register
Technical Data
318
NOTE:
NOTE:
Function:
Address:
Alternate
Port F is a 7-bit special function port that shares four of its pins with the
timer interface module (TIMA).
The pins associated with PTF6, PTF5, and PTF4 are available only in
the 64-pin QFP.
The port F data register (PTF) contains a data latch for each of the six
port F pins.
PTF[6:0] — Port F Data Bits
TACH[5:2] — Timer Channel I/O Bits
Data direction register F (DDRF) does not affect the data direction of port
F pins that are being used by the TIMA. However, the DDRF bits always
determine whether reading port F returns the states of the latches or the
states of the pins. (See
Reset:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port F pin is under the control of the corresponding bit in data
direction register F. Reset has no effect on PTF[6:0].
The PTF3–PTF0/TACH2 pins are the TIMA input capture/output
compare pins. The edge/level select bits, ELSxB–ELSxA, determine
whether the PTF3–PTF0/TACH2 pins are timer channel I/O pins or
general-purpose I/O pins. See
Control
Freescale Semiconductor, Inc.
For More Information On This Product,
$0009
Bit 7
R
R
0
Registers.
Go to: www.freescale.com
Figure 20-17. Port F Data Register (PTF)
Input/Output (I/O) Ports
= Reserved
PTF6
6
Table
PTF5
5
20-6.)
Unaffected by reset
PTF4
22.9.4 TIMA Channel Status and
4
TACH5
PTF3
3
MC68HC908AS60 — Rev. 1.0
TACH4
PTF2
2
TACH3
PTF1
1
MOTOROLA
TACH2
PTF0
Bit 0
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