MA180023 Microchip Technology, MA180023 Datasheet - Page 131

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 9-3:
TABLE 9-4:
© 2009 Microchip Technology Inc.
PORTA
LATA
TRISA
ANCON0
CMxCON
CVRCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1:
RA5/AN4/SS1/
HLVDIN/RP2
OSC2/CLKO/
RA6
OSC1/CLKI/RA7
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
Name
Pin
These bits are only available in 44-pin devices.
input/output; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
This bit is only available on 44-pin devices.
PCFG7
CVREN
TRIS7
LAT7
Bit 7
CON
PORTA I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
RA7
Function
HLVDIN
OSC2
CLKO
OSC1
CLKI
RA5
AN4
SS1
RP2
RA6
RA7
(1)
PCFG6
CVROE
TRIS6
LAT6
Bit 6
COE
RA6
Setting
TRIS
(1)
0
1
1
1
1
1
0
x
x
1
0
1
1
1
0
PCFG5
TRISA5
CVRR
CPOL
LAT5
Bit 5
RA5
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
(1)
Type
ANA A/D input channel 4. Default configuration on POR.
ANA High/Low-Voltage Detect external trip point reference input.
ANA Main oscillator feedback output connection (HS mode).
ANA Main oscillator input connection.
ANA Main clock input connection.
DIG
TTL
TTL
DIG
DIG
TTL
DIG
TTL
DIG
I/O
ST
EVPOL1
CVRSS
PCFG4
Bit 4
—
—
—
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input enabled.
Slave select input for MSSP1.
Remappable Peripheral pin 2 input.
Remappable Peripheral pin 2 output.
System cycle clock output (F
modes.
PORTA<6> data input.
LATA<6> data output.
PORTA<6> data input.
LATA<6> data output.
PIC18F46J11 FAMILY
EVPOL0
TRISA3
PCFG3
CVR3
LAT3
Bit 3
RA3
TRISA2
PCFG2
CREF
CVR2
LAT2
Bit 2
RA2
Description
OSC
TRISA1
PCFG1
CCH1
CVR1
LAT1
Bit 1
RA1
/4) in RC and EC Oscillator
TRISA0
PCFG0
CCH0
CVR0
LAT0
Bit 0
DS39932C-page 131
RA0
on page
Values
Reset
81
81
81
82
81
82