MA180023 Microchip Technology, MA180023 Datasheet - Page 272

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F46J11 FAMILY
18.3.7
In Slave mode, the data is transmitted and received as
the external clock pulses appear on SCKx. When the
last bit is latched, the SSPxIF interrupt flag bit is set.
While in Slave mode, the external clock is supplied by
the external clock source on the SCKx pin. This
external clock must meet the minimum high and low
times as specified in the electrical specifications.
While in Sleep mode, the slave can transmit/receive
data. When a byte is received, the device can be
configured to wake-up from Sleep.
18.3.8
The SSx pin allows a Synchronous Slave mode. The
SPI must be in Slave mode with the SSx pin control
enabled (SSPxCON1<3:0> = 04h). When the SSx pin
is low, transmission and reception are enabled and the
SDOx pin is driven. When the SSx pin goes high, the
SDOx pin is no longer driven, even if in the middle of a
FIGURE 18-4:
DS39932C-page 272
SSx
SCKx
(CKP = 0
CKE = 0)
SCKx
(CKP = 1
CKE = 0)
Write to
SSPxBUF
SDOx
SDIx
(SMP = 0)
Input
Sample
(SMP = 0)
SSPxIF
Interrupt
Flag
SSPxSR to
SSPxBUF
SLAVE MODE
SLAVE SELECT
SYNCHRONIZATION
SLAVE SYNCHRONIZATION WAVEFORM
bit 7
bit 7
bit 6
transmitted byte and becomes a floating output.
External pull-up/pull-down resistors may be desirable
depending on the application.
When the SPI module resets, the bit counter is forced
to ‘0’. This can be done by either forcing the SSx pin to
a high level or clearing the SSPEN bit.
To emulate two-wire communication, the SDOx pin can
be connected to the SDIx pin. When the SPI needs to
operate as a receiver, the SDOx pin can be configured
as an input. This disables transmissions from the
SDOx. The SDIx can always be left as an input (SDIx
function) since it cannot create a bus conflict.
Note 1: When the SPI is in Slave mode with
2: If the SPI is used in Slave mode with CKE
the
(SSPxCON1<3:0> = 0100),
module will reset if the SSx pin is set to
V
set, then the SSx pin control must be
enabled.
DD
bit 7
bit 7
.
SSx
© 2009 Microchip Technology Inc.
pin
Next Q4 Cycle
after Q2↓
control
bit 0
bit 0
the
enabled
SPI