MA180023 Microchip Technology, MA180023 Datasheet - Page 170

MODULE PLUG-IN PIC18F46J11 PIM

MA180023

Manufacturer Part Number
MA180023
Description
MODULE PLUG-IN PIC18F46J11 PIM
Manufacturer
Microchip Technology
Series
PIC®r
Datasheet

Specifications of MA180023

Accessory Type
Plug-In Module (PIM) - PIC18F46J11
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
PIC18
Supported Devices
Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18FxxJxx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
For Use With
DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA180023
Manufacturer:
Microchip Technology
Quantity:
135
PIC18F46J11 FAMILY
REGISTER 10-5:
REGISTER 10-6:
DS39932C-page 170
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
PTEN7
R/W-0
U-0
This register is only available in 44-pin devices.
This register is only available in 44-pin devices.
Unimplemented: Read as ‘0’
PTEN14: PMCS1 Port Enable bit
1 = PMCS1 chip select line
0 = PMCS1 functions as port I/O
Unimplemented: Read as ‘0’
PTEN<7:2>: PMP Address Port Enable bits
1 = PMA<7:2> function as PMP address lines
0 = PMA<7:2> function as port I/O
PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA<1:0> function as either PMA<1:0> or PMALH and PMALL
0 = PMA<1:0> pads functions as port I/O
PTEN14
PTEN6
R/W-0
R/W-0
PMEH: PARALLEL PORT ENABLE REGISTER HIGH BYTE (BANKED F57h)
PMEL: PARALLEL PORT ENABLE REGISTER LOW BYTE (BANKED F56h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PTEN5
R/W-0
U-0
PTEN4
R/W-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN3
R/W-0
U-0
PTEN2
R/W-0
U-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
PTEN1
R/W-0
U-0
PTEN0
R/W-0
U-0
(1)
(1)
bit 0
bit 0

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