MA180023 Microchip Technology, MA180023 Datasheet - Page 215

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.4
When Timer3 Gate Single Pulse mode is enabled, it is
possible to capture a single pulse gate event. Timer3
Gate Single Pulse mode is first enabled by setting the
T3GSPM bit in the T3GCON register. Next, the
T3GGO/T3DONE bit in the T3GCON register must be
set.
The Timer3 will be fully enabled on the next increment-
ing edge. On the next trailing edge of the pulse, the
T3GGO/T3DONE bit will automatically be cleared. No
FIGURE 14-4:
© 2009 Microchip Technology Inc.
TMR3GIF
TMR3GE
T3GSPM
T3DONE
T3GPOL
T3GVAL
T3GGO/
T3G_IN
Timer3
T1CKI
TIMER3 GATE SINGLE PULSE
MODE
TIMER3 GATE SINGLE PULSE MODE
N
Cleared by Software
Counting Enabled on
Rising Edge of T3G
Set by Software
N + 1
PIC18F46J11 FAMILY
other gate events will be allowed to increment Timer3
until the T3GGO/T3DONE bit is once again set in
software.
Clearing the T3GSPM bit of the T3GCON register will
also clear the T3GGO/T3DONE bit. See Figure 14-4
for timing details.
Enabling the Toggle mode and the Single Pulse mode,
simultaneously, will permit both sections to work
together. This allows the cycle times on the Timer3 gate
source to be measured. See Figure 14-5 for timing
details.
Set by Hardware on
Falling Edge of T3GVAL
Cleared by Hardware on
Falling Edge of T3GVAL
N + 2
DS39932C-page 215
Cleared by
Software