ATA6613-EK Atmel, ATA6613-EK Datasheet - Page 153

• Manufacturer Part Number: ATA6613-EK
• Description: BOARD DEMO LIN-MCM FOR ATA6613
• Manufacturer: Atmel

Specifications of ATA6613-EK

• Main Purpose: Interface, LIN + MCU
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ATA6613
• Primary Attributes: LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
• Secondary Attributes: 16 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.14.9
9111H–AUTO–01/11
Timer/Counter Timing Diagrams
The extreme values for the OCR1x Register represents special cases when generating a
PWM waveform output in the phase correct PWM mode. If the OCR1x is set equal to BOT-
TOM the output will be continuously low and if set equal to TOP the output will be set to high
for non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
If OCR1A is used to define the TOP value (WGM13:0 = 9) and COM1A1:0 = 1, the OC1A out-
put will toggle with a 50% duty cycle.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set, and when the OCR1x Register is updated with the OCR1x buffer value (only for
modes utilizing double buffering).
OCF1x.
Figure 6-49. Timer/Counter Timing Diagram, Setting of OCF1x, no Prescaling
Figure 6-50
Figure 6-50. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
(clk
(clk
OCRnx
TCNTn
OCFnx
TCNTn
OCRnx
OCFnx
clkTn
clkTn
clk
I/O
clk
I/O
/1)
/8)
I/O
I/O
shows the same timing data, but with the prescaler enabled.
OCRnx - 1
OCRnx - 1
Figure 6-49
OCRnx
OCRnx
OCRnx Value
OCRnx Value
Atmel ATA6612/ATA6613
shows a timing diagram for the setting of
OCRnx + 1
OCRnx + 1
T1
) is therefore shown as a
OCRnx + 2
OCRnx + 2
clk_I/O
/8)
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