ATA6613-EK Atmel, ATA6613-EK Datasheet - Page 295

• Manufacturer Part Number: ATA6613-EK
• Description: BOARD DEMO LIN-MCM FOR ATA6613
• Manufacturer: Atmel

Specifications of ATA6613-EK

• Main Purpose: Interface, LIN + MCU
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ATA6613
• Primary Attributes: LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
• Secondary Attributes: 16 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.23.7.10
6.23.7.11
9111H–AUTO–01/11
Preventing Flash Corruption
Programming Time for Flash when Using SPM
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction
is executed within three cycles after the BLBSET and SELFPRGEN bits are set in the
SPMCSR, the value of the Extended Fuse byte (EFB) will be loaded in the destination register
as shown below. Refer to
Extended Fuse byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the Flash requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage for executing
instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
The calibrated RC Oscillator is used to time Flash accesses.
programming time for Flash accesses from the CPU.
Table 6-106. SPM Programming Time
Symbol
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
1. If there is no need for a Boot Loader update in the system, program the Boot Loader
2. Keep the AVR
3. Keep the AVR core in Power-down sleep mode during periods of low V
Rd
Bit
Lock bits to prevent any Boot Loader software updates.
age. This can be done by enabling the internal Brown-out Detector (BOD) if the
operating voltage matches the detection level. If not, an external low V
tection circuit can be used. If a reset occurs while a write operation is in progress, the
write operation will be completed provided that the power supply voltage is sufficient.
prevent the CPU from attempting to decode and execute instructions, effectively pro-
tecting the SPMCSR Register and thus the Flash from unintentional writes.
7
–
®
RESET active (low) during periods of insufficient power supply volt-
CC
Table 6-116 on page 302
, the Flash program can be corrupted because the supply voltage is
6
–
5
–
Min Programming Time
4
–
Atmel ATA6612/ATA6613
3.7ms
for detailed description and mapping of the
EFB3
3
EFB2
2
Table 6-106
Max Programming Time
EFB1
1
CC
shows the typical
CC
4.5ms
EFB0
. This will
reset pro-
0
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