ATA6613-EK Atmel, ATA6613-EK Datasheet - Page 246

• Manufacturer Part Number: ATA6613-EK
• Description: BOARD DEMO LIN-MCM FOR ATA6613
• Manufacturer: Atmel

Specifications of ATA6613-EK

• Main Purpose: Interface, LIN + MCU
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ATA6613
• Primary Attributes: LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
• Secondary Attributes: 16 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.19.8
6.19.8.1
246
Atmel ATA6612/ATA6613
Transmission Modes
Master Transmitter Mode
The TWI can operate in one of four major modes. These are named Master Transmitter (MT),
Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several of these
modes can be used in the same application. As an example, the TWI can use MT mode to
write data into a TWI EEPROM, MR mode to read the data back from the EEPROM. If other
masters are present in the system, some of these might transmit data to the TWI, and then SR
mode would be used. It is the application software that decides which modes are legal.
The following sections describe each of these modes. Possible status codes are described
along with figures detailing data transmission in each of the modes. These figures contain the
following abbreviations:
S: START condition
Rs: REPEATED START condition
R: Read bit (high level at SDA)
W: Write bit (low level at SDA)
A: Acknowledge bit (low level at SDA)
A: Not acknowledge bit (high level at SDA)
Data: 8-bit data byte
P: STOP condition
SLA: Slave Address
In
TWINT Flag is set. The numbers in the circles show the status code held in TWSR, with the
prescaler bits masked to zero. At these points, actions must be taken by the application to
continue or complete the TWI transfer. The TWI transfer is suspended until the TWINT Flag is
cleared by software.
When the TWINT Flag is set, the status code in TWSR is used to determine the appropriate
software action. For each status code, the required software action and details of the following
serial transfer are given in
prescaler bits are masked to zero in these tables.
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave Receiver
(see
transmitted. The format of the following address packet determines whether Master Transmit-
ter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if
SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section
assume that the prescaler bits are zero or are masked to zero.
Figure 6-89 on page 249
Figure 6-88 on page
247). In order to enter a Master mode, a START condition must be
Table 6-90 on page 248
to
Figure 6-95 on page
to
259, circles are used to indicate that the
Table 6-93 on page
258. Note that the
9111H–AUTO–01/11