ATA6613-EK Atmel, ATA6613-EK Datasheet - Page 324

• Manufacturer Part Number: ATA6613-EK
• Description: BOARD DEMO LIN-MCM FOR ATA6613
• Manufacturer: Atmel

Specifications of ATA6613-EK

• Main Purpose: Interface, LIN + MCU
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ATA6613
• Primary Attributes: LIN-SBC (System-Basis-Chip) Transceiver, LIN 2.0, Voltage Regulator, Window Watchdog
• Secondary Attributes: 16 kB Flash, 4 Power Modes: Pre-Normal, Normal, Sleep, Silent, 48-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.26.2.1
7. 2-wire Serial Interface Characteristics
Table 7-1
2-wire Serial Interface meets or exceeds these requirements under the noted conditions.
Timing symbols refer to
Table 7-1.
324
Symbol
Notes:
Vhys
VOL
tSP
tof
VIH
VIL
tr
I
(1)
i
(1)
(1)
(1)
(1)
1. In Atmel ATA6612/ATA6613, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all Atmel ATA6612/ATA6613 2-wire Serial Interface operation. Other devices connected to the
6. The actual low period generated by the Atmel ATA6612/ATA6613 2-wire Serial Interface is (1/f
7. The actual low period generated by the Atmel ATA6612/ATA6613 2-wire Serial Interface is (1/f
Atmel ATA6612/ATA6613
describes the requirements for devices connected to the 2-wire Serial Bus. The Atmel
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Rise Time for both SDA and SCL
Output Fall Time from V
Spikes Suppressed by Input Filter
Input Current each I/O Pin
2-wire Serial Bus need only obey the general f
greater than 6MHz for the low time requirement to be strictly met at f
time requirement will not be strictly met for f
nected to the bus may communicate at full speed (400kHz) with other Atmel ATA6612/ATA6613 devices, as well as any
other device with a proper t
CK
RC Oscillator Precision for LIN Slave implementation
b
2-wire Serial Bus Requirements
= capacitance of one bus line in pF.
= CPU clock frequency
Figure 7-1 on page
For LIN slave devices, the precision of the RC oscillator before and after re-synchronization
are described in the
Table 6-130. Oscillator Tolerance Before and After Re-synchronization Algorithm
SCL
Parameter
F
F
TOL_UNSYNCH
TOL_SYNCH
> 100kHz.
IHmin
LOW
to V
acceptance margin.
ILmax
(2.7V < V
326.
Clock Tolerance
Deviation of slave node clock from the nominal clock rate before
synchronization; relevant for nodes making use of
synchronization and direct SYNCH BREAK detection.
Deviation of slave node clock relative to the master node clock
after synchronization; relevant for nodes making use of
synchronization; any slave node must stay within this tolerance
for all fields of a frame which follow the SYNCH FIELD.
Note:
Table
SCL
CC
Condition
10pF < C
0.1V
3mA sink current
SCL
6-130.
> 308kHz when f
< 5.5V, -40 C to +125 C)
rate must not differ by more than ±2%.
For communication between any two nodes their bit
CC
requirement.
< V
b
< 400pF
i
< 0.9V
CC
(3)
CK
= 8MHz. Still, Atmel ATA6612/ATA6613 devices con-
SCL
= 100kHz.
20 + 0.1C
20 + 0.1C
0.05 V
0.7 V
Min
-0.5
-10
0
0
CC
CC
b
b
(2)
(2,3)
(2,3)
SCL
SCL
- 2/f
- 2/f
®
V
ATA6612/ATA6613
0.3 V
CK
CC
CK
Max
50
300
250
0.4
), thus f
10
–
), thus the low
+ 0.5
(2)
CC
9111H–AUTO–01/11
±14.0%
±2.0%
F/F
CK
Master
must be
Units
µA
ns
ns
ns
V
V
V
V