MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 120

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(3) 16-bit timer capture/compare register 01 (CR01)
Remarks 1. Setting ES001, ES000 = 1, 0 is prohibited.
118
Falling edge
Rising edge
Both rising and falling edges
CR01 is a 16-bit register that has the functions of both a capture register and a compare register. Whether it is
used as a capture register or a compare register is set by bit 2 (CRC002) of capture/compare control register 00
(CRC00).
CR01 can be set by a 16-bit memory manipulation instruction.
RESET input clears this register to 0000H.
Cautions 1. If the CR01 register is cleared to 0000H, an interrupt request (INTTM01) is generated after
When CR01 is used as a compare register
The value set in the CR01 is constantly compared with 16-bit timer counter 00 (TM00) count value, and an
interrupt request (INTTM01) is generated if they match. The set value is held until CR01 is rewritten.
When CR01 is used as a capture register
It is possible to select the valid edge of the TI000 pin as the capture trigger. The TI000 pin valid edge is set by
prescaler mode register 00 (PRM00) (see Table 7-3).
2. ES001, ES000: Bits 5 and 4 of prescaler mode register 00 (PRM00)
CR01 Capture Trigger
Address: FF7CH, FF7DH
Symbol
CR01
CRC002:
2. When CR01 is used as a capture register, read data is undefined if the register read time
3. CR01 can be rewritten during TM00 operation. For the details of how to rewrite CR01, see
the TM00 register overflows, after the timer is cleared and started on a match between the
TM00 register and the CR00 register, or after the timer is cleared by the valid edge of the
TI000 pin or a one-shot trigger.
and capture trigger input conflict (the capture data itself is the correct value).
If count stop input and capture trigger input conflict, the captured data is undefined.
Caution 2 of Figure 7-15.
Table 7-3. CR01 Capture Trigger and Valid Edge of TI000 Pin (CRC002 = 1)
Figure 7-4. Format of 16-Bit Timer Capture/Compare Register 01 (CR01)
Bit 2 of capture/compare control register 00 (CRC00)
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
FF7DH
After reset: 0000H
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U17890EJ2V0UD
R/W
TI000 Pin Valid Edge
FF7CH
ES001
0
0
1
ES000
0
1
1