MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 244

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(2) Generation of serial clock
242
A serial clock can be generated by using baud rate generator control register 00 (BRGC00).
Select the clock to be input to the 5-bit counter by using bits 7 and 6 (TPS001 and TPS000) of BRGC00.
Bits 4 to 0 (MDL004 to MDL000) of BRGC00 can be used to select the division value of the 5-bit counter.
(a) Baud rate
(b) Error of baud rate
The baud rate can be calculated by the following expression.
f
k:
The baud rate error can be calculated by the following expression.
Cautions 1. Keep the baud rate error during transmission to within the permissible error range at
XCLK0
Baud rate =
Error (%) =
Example: Frequency of base clock = 2.5 MHz = 2,500,000 Hz
: Frequency of base clock selected by the TPS001 and TPS000 bits of the BRGC00 register
Value set by the MDL004 to MDL000 bits of the BRGC00 register (k = 8, 9, 10, ..., 31)
2. Make sure that the baud rate error during reception satisfies the range shown in (4)
f
the reception destination.
Permissible baud rate range during reception.
2
XCLK0
Set value of MDL004 to MDL000 bits of BRGC00 register = 10000B (k = 16)
Target baud rate = 76,800 bps
Baud rate = 2.5 M/(2
Error = (78,125/76,800
Actual baud rate (baud rate with error)
Desired baud rate (correct baud rate)
k
= 1.725 [%]
[bps]
= 2,500,000/(2
CHAPTER 14 SERIAL INTERFACE UART00
User’s Manual U17890EJ2V0UD
16)
1)
16) = 78,125 [bps]
100
1
100 [%]

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