MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 303

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
20.4 Operation of Low-Voltage Detector
The low-voltage detector can be used in the following two modes.
The operation is set as follows.
(1) When used as reset
Used as reset
Compares the supply voltage (V
V
Used as interrupt
Compares the supply voltage (V
when V
DD
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<3> Use software to instigate a wait of at least 0.2 ms.
<4> Wait until it is checked that “supply voltage (V
<5> Set bit 1 (LVIMD) of LVIM to 1 (generates internal reset signal when supply voltage (V
Figure 20-4 shows the timing of the internal reset signal generated by the low-voltage detector. The numbers
in this timing chart correspond to <1> to <5> above.
Cautions 1. <1> must always be executed. When LVIMK = 0, an interrupt may occur immediately
< V
When starting operation
When stopping operation
Either of the following procedures must be executed.
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
When using 1-bit memory manipulation instruction:
Clear LVIMD to 0 first, and then clear LVION to 0.
DD
voltage (V
LVI
.
< V
2. If supply voltage (V
LVI
.
after the processing in <2>.
signal is not generated.
LVI
)).
CHAPTER 20 LOW-VOLTAGE DETECTOR
DD
DD
) and detection voltage (V
) and detection voltage (V
DD
) > detection voltage (V
User’s Manual U17890EJ2V0UD
DD
) > detection voltage (V
LVI
LVI
), and generates an internal reset signal when
LVI
), and generates an interrupt signal (INTLVI)
) when LVIM is set to 1, an internal reset
LVI
)” by bit 0 (LVIF) of LVIM.
DD
) < detection
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