MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 94

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.6
clock and high-speed system clock.
are executed using the pre-switch clock after switching MCM0 (see Table 5-5).
clock or high-speed system clock.
Table 5-5. Maximum Time Required to Switch Between Internal Low-speed Oscillation Clock and High-speed
92
Bit 0 (MCM0) of the main clock mode register (MCM) is used to switch between the internal low-speed oscillation
In the actual switching operation, switching does not occur immediately after MCM0 rewrite; several instructions
Bit 1 (MCS) of MCM is used to judge that operation is performed using either the internal low-speed oscillation
To stop the original clock after switching the clock, wait for the number of clocks shown in Table 5-5.
Caution To calculate the maximum time, set f
Remarks 1. PCC: Processor clock control register
Time Required to Switch Between Internal Low-speed Oscillation Clock and High-speed
System Clock
PCC2
System Clock
0
0
2. f
3. f
4. The maximum time is the number of clocks of the CPU clock before switching.
PCC1
PCC
XP
RL
0
0
: Internal low-speed oscillation clock oscillation frequency
: High-speed system clock oscillation frequency
PCC0
0
1
f
f
XP
XP
/f
/2f
Internal Low-speed Oscillation Clock
CHAPTER 5 CLOCK GENERATOR
RL
RL
+ 1 clock
High-speed System Clock
+ 1 clock
User’s Manual U17890EJ2V0UD
RL
= 120 kHz.
Time Required for Switching
2 clocks
Internal Low-speed Oscillation Clock
High-speed System Clock

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