MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 158

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.3
(1) Timer clock selection register 5n (TCL5n)
156
The following four registers are used to control 8-bit timer/event counters 50 and 51.
Note Be sure to set the count clock so that the following condition is satisfied.
Cautions 1. When the internal low-speed oscillation clock is selected as the source clock to the CPU, the
Remark f
This register sets the count clock of 8-bit timer/event counter 5n and the valid edge of the TI50 pin input.
TCL5n can be set by an 8-bit memory manipulation instruction.
RESET input clears TCL5n to 00H.
Remark n = 0, 1
Address: FF2EH
Symbol
TCL50
Timer clock selection register 5n (TCL5n)
8-bit timer mode control register 5n (TMC5n)
Port mode register 5 (PM5)
Port register 5 (P5)
Registers Controlling 8-Bit Timer/Event Counters 50 and 51
V
DD
2. When rewriting TCL50 to other data, stop the timer operation beforehand.
3. Be sure to clear bits 3 to 7 to 0.
X
: X1 input clock oscillation frequency
= 4.0 to 5.5 V: Count clock
clock of the internal low-speed oscillator is divided and supplied as the count clock. If the
count clock is the internal low-speed oscillation clock, the operation of 8-bit timer/event
counter 50 is not guaranteed.
TCL502
7
0
0
0
0
0
1
1
1
1
After reset: 00H
Figure 8-5. Format of Timer Clock Selection Register 50 (TCL50)
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
TCL501
6
0
0
0
1
1
0
0
1
1
R/W
TCL500
10 MHz
User’s Manual U17890EJ2V0UD
5
0
0
1
0
1
0
1
0
1
TI50 pin falling edge
TI50 pin rising edge
f
f
f
f
f
f
X
X
X
X
X
X
/2
/2
/2
/2
/2
/2
2
4
6
8
13
4
0
3
0
Count clock selection
10 MHz
5 MHz
1.25 MHz
312.5 kHz
78.125 kHz
2.44 kHz
At f
TCL502
X
= 20 MHz
2
TCL501
Note
8 MHz
4 MHz
1 MHz
250 kHz
62.5 kHz
1.953 kHz
1
At f
X
= 16 MHz
TCL500
0