MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 272

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.4.2 Software interrupt request acknowledgment
disabled.
status word (PSW), then program counter (PC), the IE flag is reset (0), and the contents of the vector table (003EH,
003FH) are loaded into the PC and branched.
270
CPU processing
CPU processing
Remark 1 clock: 1/f
Remark 1 clock: 1/f
A software interrupt request is acknowledged by BRK instruction execution.
If a software interrupt request is acknowledged, the contents are saved into the stacks in the order of the program
Restoring from a software interrupt is possible by using the RETB instruction.
Caution Do not use the RETI instruction for restoring from the software interrupt.
(
(
(
(
PR = 1)
PR = 0)
PR = 1)
PR = 0)
IF
IF
IF
IF
Figure 16-9. Interrupt Request Acknowledgment Timing (Maximum Time)
Figure 16-8. Interrupt Request Acknowledgment Timing (Minimum Time)
CPU
CPU
(f
(f
Instruction
Instruction
CPU
CPU
: CPU clock)
: CPU clock)
CHAPTER 16 INTERRUPT FUNCTIONS
User’s Manual U17890EJ2V0UD
Divide instruction
Instruction
25 clocks
33 clocks
32 clocks
8 clocks
PSW and PC saved,
jump to interrupt
servicing
PSW and PC saved,
jump to interrupt
servicing
7 clocks
Software interrupts cannot be
6 clocks
6 clocks
Interrupt servicing
program
Interrupt servicing
program

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